1. Technology Field
The present invention is related to a clock delaying technique and more particularly, to a sampling circuit module, a memory control circuit unit and a method for sampling data.
2. Description of Related Art
In a memory system, a clock signal is commonly served as a basis during a circuit operation. Generally, a clock signal is generated by an oscillator and transmitted to each chip in the memory system through a connecting line. However, a phase shift may occur during the transmission of the clock signal. The temperature and change of a voltage provided by the system may also be reasons which cause the phase shift. The phase shift may lead the memory system to a rise in an error rate when performing a data writing or reading operation.
Delay-locked loops (DLL) are used for resolving an unsynchronization issue of the clock signal transmitted to each chip. The delay-locked loops may be classified into two types, analog delay circuits and digital delay circuits. An analog delay circuit controls a delay time of a delay line by using a voltage, and an output clock of the analog delay circuit is easily interfered by noise from a power source and temperature. A digital delay circuit dynamically changes an amount of delay or a delay stage of the delay line by means of transmitting an indication signal and has better capability for resisting the interference. Changes in the amount of delay or the delay stage of the delay line of the digital delay circuit usually lead to clock jitter during the clock signal being output.
Specially, for a memory system using the digital delay circuit, when data is being written into or read from the memory system, the accuracy of the read or written data may be reduced if a phase shift of the clock signal is too large and is not corrected immediately.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.